1. Field of the Invention
The present invention relates to a bipolar transistor and more particularly to a fully self-aligned heterojunction bipolar transistor (hereinafter, referred to as xe2x80x9cHBTxe2x80x9d) with an overlay on the mask layout between the emitter and base electrodes.
2. Discussion of Related Art
Generally, HBTs are one of the most important transistors for the microwave frequency band which requires high speed characteristics. Both the emitter and the base of the HBTs are semiconductors, the emitter having a large energy band gap and the base having a small energy band gap. The difference in the energy band gap enables the HBTs to maintain a high current gain and to reduce the base series resistances by heavily doping the base with impurities. As a result, the HBTs have high speed characteristics.
The HBTs are especially used in the field of power amplifiers over 1 GHz because HBTs have a high current density and a good linear property. The HBTs are also being used as a power amplifier in the 900 MHz digital CDMA and the 1.8 GHz PCS telephone, and are expected to be used in later mobile communication services such as IMT2000. A high speed is essential to the HBTs for later use in the field of millimeter waves above 30 GHz such as Local Multipoint Distribution Service (LMDS), Automotive Car Collision Avoidance Radar (ACCAR), Wireless Local Area Network (WLAN), as well as in the field of 1-2 GHz mobile communication.
Basically, a figure-of-merit indicating the high speed characteristic of a transistor is the maximum usable oscillation frequency fmax. The maximum usable oscillation frequency of HBTs used in the latest mobile communication telephone is typically below 30 GHz. For use of HBTs in frequency environments above 30 GHz, the maximum usable oscillation frequency must be greater than 100 GHz. Recently, HBTs with a maximum usable oscillation frequency above 100 GHz have been produced due to scale-down.
The maximum usable oscillation frequency fmax of an HBT may be expressed by Equation 1 below:                               f          max                =                              [                                          f                t                                            8                xc3x97                π                xc3x97                                  R                  b                                xc3x97                                  C                  bc                                                      ]                    0.5                                    [                  Equation          ⁢                      xe2x80x83                    ⁢          1                ]            
where ft is the current gain cut-off frequency, Rb is the base series resistance, and Cbc is the electrostatic capacitance of a depletion layer between the base and collector. The Rb value of HBT is low because the base is heavily doped in the HBTs, and is much smaller than the Rb of a silicon Bipolar Junction Transistor (BJT). The ft value is inversely proportional to the transit time of charges (carriers) flowing from the emitter to the collector of a transistor and is dependent upon the vertical epitaxy structure of the HBT, without being affected by the layout of a mask. The ft value may be expressed as follows:                               1                      2            xc3x97            π            xc3x97                          f              t                                      =                              k            xc3x97                          T                              q                xc3x97                                  I                  E                                                      xc3x97                          (                                                C                  jbe                                +                                  C                  bc                                            )                                +                      τ            b                    +                      τ            bcscr                                              [Equation 2]            
where kxc3x97T/q is the thermal voltage, IE is the emitter current, Cjbe is the electrostatic capacitance of a depletion layer between the emitter and the base, xcfx84b is the base transit time, and xcfx84bcscr is the running time in a depletion layer between the base and the collector. To increase fmax, the ft value must be enhanced while reducing the Rb and Cbc values.
FIGS. 1a and 1b are plane and cross-sectional views of a MESA type HBT in the related art with a self-aligned emitter and base electrodes. The effects of the transistor structure on the maximum usable oscillation frequency will be described with reference to FIGS. 1a and 1b. 
The maximum usable oscillation frequency fmax is largely proportional to 1/Wxc2xd because Rb is proportional to 1/L while Cbc is proportional to Wxc3x97L. Thus, the width WE of the emitter electrode 14 and the width W of the base-collector PN junction must be reduced to enhance the maximum usable oscillation frequency on the plane structure of a transistor. Accordingly, if ft stays constant, the emitter and base electrodes 14 and 15 must be self-aligned such that LBE is minimized to lower the base resistance Rb, and W and WE are minimized to decrease the base-collector electrostatic capacitance Cbc.
The HBT shown in FIGS. 1a and 1b uses an air bridge 12 connecting the emitter electrode 14 to the exterior of the transistor. However, the air bridge 12 limits the reduction of the width WE of emitter electrode 14. Particularly, the width WE of emitter electrode 14 must be sufficiently greater than the width Wair of an air bridge such that WE greater than Wair+xcex1, where xcex1≈2.0 xcexcm. If the air bridge is misaligned and extends out of the emitter electrode 14, an electrical short occurs between emitter and base electrodes 14 and 15. Thus, the HBT structure shown in FIGS. 1a and 1b limits the reduction of the widths WE and W, and the maximum usable oscillation frequency is difficult to raise.
For the HBT operating in the millimeter wave band greater than 30 GHz, the desirable width of emitter electrode is below 1 xcexcm and a different HBT structure is required. Generally, the second HBT structure, shown in FIG. 2, is made using a method of reducing the widths WE and W through a metal wiring process utilizing planarization of polyimide 30. This process allows a fabrication of a HBT used in the millimeter wave band with small widths WE and W, because the polyimide 30 electrically isolates the emitter and the base electrodes 14 and 15 even if the emitter electrode 14 is formed with a metal having a wiring width greater than WE. However, controlling the fabrication process for this structure is difficult.
The fabrication process of HBTs shown in FIGS. 1 and 1b and FIG. 2 will next be described. FIGS. 3a-3h are cross-sectional views illustrating a fabricating process for the HBT shown in FIGS. 1a and 1b. FIGS. 4a-4e are cross-sectional views illustrating a fabricating process for the HBT shown in FIG. 2.
As shown in FIG. 3a, a sub-collector layer 21, a collector layer 20, a base layer 16, an emitter layer 19 and an ohmic cap layer 18 are sequentially formed on a semiconductor substrate 22 by means of epitaxial growth. Next, an emitter electrode 14 consisting of a metal is formed in a defined profile on the resulting structure. As shown in FIG. 3b, the emitter electrode 14 is used as a mask in etching the structure so as to expose the base layer 16. The etching technique utilized is typically reactive ion etching or wet etching. As a result of the etching process, an undercut profile as shown in part B of FIG. 3b is formed.
After forming a defined photoresist pattern at a portion including the emitter electrode 14, base metal layers 15 and 15xe2x80x2 are deposited on the entire surface and lifted off to form a base electrode 15, as shown in FIG. 3c. The base electrode 15 is self-aligned around the emitter electrode 14 due to the undercut B formed by the etching step. This lowers the parasitic resistance Rb of the base. The thickness t of the base electrode 15 must be smaller than the sum (indicated by xe2x80x9csxe2x80x9d of FIG. 3b) of the emitter layer 19 thickness and the ohmic cap layer 18 thickness of the emitter.
As shown in FIG. 3d, the base layer 16 and the collector layer 20 are etched to define a base-collector PN junction C. Subsequently, a collector electrode 17 is formed in a defined profile on the sub-collector layer 21, as shown in FIG. 3e. Following the formation of the collector electrode 17, ions are injected into the sub-collector layer 21 to form an insulating layer 10, shown in FIG. 3f. The injected ions are boron. A pad 11 is formed with a wiring metal, as shown in FIG. 3g and an air bridge 12 is formed to connect the emitter electrode 14 with the external pad 11 of the transistor, which completes the HBT, as shown in FIG. 3h. 
Referring to FIG. 4a, the procedures as described above in reference to FIGS. 3a-3g are repeated in the fabrication of the HBT shown in FIG. 2. Subsequently, the entire surface is coated with a polyimide 30, shown in FIG. 4b. The polyimide is formed in the plane profile irrespective of the unevenness of the substrate because of its surface tension peculiar to the liquid. However, to planarize the polyimide 30, the thickness xe2x80x9cuxe2x80x9d must be at least two times greater than the maximum height xe2x80x9cvxe2x80x9d of the ledge of the substrate.
After the polyimide 30 is coated with a thickness sufficient to planarize the surface, the surface of polyimide 30 is etched continuously until the base metal layer 15xe2x80x2 is exposed on the emitter electrode 14, shown in FIG. 4c. The etching must be stopped accurately at the moment the base metal layer 15xe2x80x2 is exposed. The etching technique utilized is typically reactive ion etching (RIE) using oxygen plasma. As shown in FIG. 4d, a contact hole 25 is perforated to expose a portion of the pad 11. Thereafter, a wiring metal 12xe2x80x2 is used to connect the emitter electrode 15xe2x80x2 and the pad 11 to complete the HBT, shown in FIG. 4e. 
The HBTs in the related art have several problems. First, it is difficult to control the exact point in time to stop etching the polyimide. An excessive etching causes an electrical short at the emitter-base junction during the later metal wiring step. On the other hand, the etching is not sufficiently performed, the emitter electrode 14 will be electrically opened.
Second, the etching has to be stopped at a moment the emitter electrode is exposed in the HBT fabrication process of in the related art. However, it is difficult to automatically stop the etching utilizing an end point detector in the RIE equipment or to observe the end point with a microscope, because the emitter electrode is one of the smallest portion of the substrate.
Third, a separate mask is required to define the base-collector PN junction, which makes it difficult to minimize the width of the base-collector PN junction in the manner of self-alignment. Fourth, the HBT fabrication process in the related art uses an emitter surrounding band (a structure depleted around the emitter and remaining the thin emitter) or a surface-passivating depleted emitter ledge (referred to as xe2x80x9cledge structurexe2x80x9d). This increases the width of the base-collector PN junction since a separate mask is required to prepare such a structure.
Accordingly, an object of the present invention is to solve at least the problems and disadvantages of the related art.
An object of the present invention is to provide a HBT with a reduced base-collector junction capacitance and a high speed characteristic by a scale-down of the areas of the emitter and the base-collector junction.
Another object of the present invention is to provide an HBT by a simplified fabrication process.
A further object of the present invention is to provide an HBT with a high product yield and a prolonged life time.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve the objects and in accordance with the purposes of the invention, as embodied and broadly described herein, etching a planarized insulating layer is easily stopped by reducing the thickness of the planarized insulating layer. As shown in FIG. 6f, reducing the thickness of the insulating layer is possible because the step difference of the surface is decreased by depositing a first insulating layer 300 prior to the deposition of the planarized insulating layer. The first insulating layer is formed by depositing a material such as silicon oxide (SiOx) or silicon nitride (SiNx).
Consequently, the etching can be stopped automatically with an end point detector because an oxygen reactive ion etching (RIE) of the polymide (planarized insulating layer) 220 barely etches the first insulating layer 300 such as SiOx or SiNx. Furthermore, the first insulating layer 300 has an area large enough to observe the etching end point of the planarized insulating layer, enhancing the accuracy of the end point. The planarized insulating layer 220 and base metal layer 140xe2x80x2 on top of the emitter electrode are used as a mask in etching a base-collector PN junction in a manner of self-alignment.
In an another embodiment of the present invention, a first insulating layer is formed on the sidewall of the emitter in a manner of self-alignment and is used as an etching mask to form a depleted emitter ledge structure 210xe2x80x2 of FIG. 11f around the emitter layer 210. This ledge reduces the surface recombination 1/f noise at the top surface of the base 230 which causes a low frequency noise and decreases the non-radiative recombination current at this portion. This reduces the defect occurrence in the base layer and enhances the life time of the HBT. Unlike the related art requiring a separate mask in the fabrication of the HBT, the present invention can prepare the ledge in a manner of self-alignment by use of an insulating layer sidewall 300xe2x80x2 that can be formed automatically in the step of etching the first insulating layer, as shown in FIGS. 11e and 12a.